Wish List - Hardware:FPGA

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===AT91CAP9S500A (ARM9 + FPGA-port)===
 
===AT91CAP9S500A (ARM9 + FPGA-port)===
 
Why FPGA?:
 
Why FPGA?:
 +
*[http://www.newsroom.ucr.edu/cgi-bin/display.cgi?id=1689 October 17, 2007 ucr.edu: UC Riverside Research Leads to Self-Improving Chips with Speed ‘Warping’] Computer science research results in new technology that can outperform standard microprocessors up to 1,000 times.
 
*[http://hardware.silicon.com/servers/0,39024647,39166443,00.htm?r=1  20 March 2007 Green supercomputer is 'go' in Scotland] Quote: "...A supercomputer 10 times more energy efficient and up to 300 times faster than its traditional equivalents..."
 
*[http://hardware.silicon.com/servers/0,39024647,39166443,00.htm?r=1  20 March 2007 Green supercomputer is 'go' in Scotland] Quote: "...A supercomputer 10 times more energy efficient and up to 300 times faster than its traditional equivalents..."
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*[http://wiki.duskglow.com/tiki-index.php?page=OGPN17 Dec 10th 2006 Open Graphics Project Newsletter] Quote: "...We know how long you have dreamt about the possibility of a fully open graphics card. We have the First Photographs of what will be a genuinely Open Graphics Card. This card is not a dream. The card is real...The prototype, is a PCI based FPGA development card with dual DVI output, TV-out and three 300MHz Analog to Digital Converters..."
 +
*[http://csg.csail.mit.edu/oshd/ MIT: FPGA projects: E.g. HD quality H.264 baseline profile decoder. Supports 1080p at 60 frames per second]
  
 
Take a look at this microcontroller, that integrates an ARM9 microcontroller and a dedicated FPGA port: AT91CAP9S500A. It has "only" a max. clock at 200MHz, but can use a FPGA for hardware acceleration, that could be used for video (de)compression, [http://en.wikipedia.org/wiki/AacPlus_v2 aacPlus v2]/[http://en.wikipedia.org/wiki/HE-AAC_v2 HE-AAC v2] sound (de)compression and many other things. HE-AAC v2 is better than [http://en.wikipedia.org/wiki/MP3 MP3].
 
Take a look at this microcontroller, that integrates an ARM9 microcontroller and a dedicated FPGA port: AT91CAP9S500A. It has "only" a max. clock at 200MHz, but can use a FPGA for hardware acceleration, that could be used for video (de)compression, [http://en.wikipedia.org/wiki/AacPlus_v2 aacPlus v2]/[http://en.wikipedia.org/wiki/HE-AAC_v2 HE-AAC v2] sound (de)compression and many other things. HE-AAC v2 is better than [http://en.wikipedia.org/wiki/MP3 MP3].
 
*[http://www.atmel.com/dyn/products/product_card.asp?family_id=689&family_name=AT91CAP+Microcontrollers&part_id=4137 AT91CAP9S500A] Quote: "...The AT91CAP9S500A is built around a 12-layer bus matrix, allowing a maximum internal bandwidth of twelve 32-bit buses. Its distributed DMA architecture enables multiple data transfers to take place between the processor, memories and peripherals with minimal processor overhead...".
 
*[http://www.atmel.com/dyn/products/product_card.asp?family_id=689&family_name=AT91CAP+Microcontrollers&part_id=4137 AT91CAP9S500A] Quote: "...The AT91CAP9S500A is built around a 12-layer bus matrix, allowing a maximum internal bandwidth of twelve 32-bit buses. Its distributed DMA architecture enables multiple data transfers to take place between the processor, memories and peripherals with minimal processor overhead...".
 
*[http://www.atmel.com/dyn/resources/prod_documents/doc6310.pdf GNU-Based Software Development on AT91SAM Microcontrollers]
 
*[http://www.atmel.com/dyn/resources/prod_documents/doc6310.pdf GNU-Based Software Development on AT91SAM Microcontrollers]
*Maybe this is a good tool?: [http://www.jhdl.org/ BYU JHDL, Open Source FPGA CAD Tools]
+
*Maybe this is a good tool?:
 +
**[http://www.arsc.edu/news/archive/fpga/Wed-1030-Najjar.pdf Compiled Acceleration of C Codes for FPGAs (pdf)] Quote: "...Riverside Optimizing Compiler for Configurable Computing. A C/C++ to VHDL compiler...Same speed as hand-written VHDL codes...[http://www.cs.ucr.edu/~roccc/ ROCCC] is not intended to compile the whole code to FPGA. Only compute intensive code segments, typically parallel loops..."
 +
**[http://www.jhdl.org/ BYU JHDL, Open Source FPGA CAD Tools]
 +
*** [[user:jcarroll|I]] work for the lab that produced JHDL.  Are you interested in using it? --[[User:Jcarroll|Jcarroll]] 20:13, 15 July 2008 (UTC)
 
*[http://www.eetimes.com/showArticle.jhtml;?articleID=197002705 02/05/2007, FPGA tool bottleneck stalls HPC] Quote: "...Current FPGA synthesis, placement and routing tools are written for hardware designers, not software programmers simply trying to accelerate an algorithm..."
 
*[http://www.eetimes.com/showArticle.jhtml;?articleID=197002705 02/05/2007, FPGA tool bottleneck stalls HPC] Quote: "...Current FPGA synthesis, placement and routing tools are written for hardware designers, not software programmers simply trying to accelerate an algorithm..."
  
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I do not think this means what you think it means... I read "...and a metal programmable (MP) block of 500K gates of digital logic." as meaning that it's a one-time programmable block, more akin to a standard-cell ASIC than an FPGA. This is supported by the fact that their development board contains a separate FPGA chip. Now, granted, having a 500K gate ASIC on board an ARM is a cool thing... but not quite as cool as this chip appeared at first glance.
 
I do not think this means what you think it means... I read "...and a metal programmable (MP) block of 500K gates of digital logic." as meaning that it's a one-time programmable block, more akin to a standard-cell ASIC than an FPGA. This is supported by the fact that their development board contains a separate FPGA chip. Now, granted, having a 500K gate ASIC on board an ARM is a cool thing... but not quite as cool as this chip appeared at first glance.
 +
 +
==Possible FPGA==
 +
This FPGA is just an example:
 +
*[http://www.xilinx.com/products/silicon_solutions/fpgas/spartan_series/spartan3an_fpgas/capabilities/index.htm Spartan-3AN FPGA Capabilities] Quote: "...Simple and secure embedded application storage with up to 11Mb of integrated user Flash...Enable simple arithmetic and math functions as well as advanced DSP functions to derive over 330 Giga MACs/sec...Up to 32 18 x 18 embedded multipliers support 18-bit signed or 17-bit unsigned multiplication, and can be cascaded to support wider bits..."
 +
**XC3S1400AN-4FGG676CES $91
 +
**XC3S200AN-4FTG256CES $25.87
 +
 +
*It might be better to introduce a flash based FPGA e.g. one of the [http://www.actel.com/products/igloo/default.aspx#features igloo series] produced by actel, they claim to save a real amount of power. They are available for 20$ for one piece, claimed around 1$ in mass. One also saves PCB space, because no external flash is needed, although the above mentioned Spartan series has also integrated configuration flash, but that is non-standard for SRAM based FPGAs so far. The igloo devices do not have dsp slices, also the amount of RAM is smaller.
 +
 +
====Tool for FPGAs====
 +
*[http://www.xilinx.com/ise/logic_design_prod/webpack.htm xilinx.com: ISE WebPACK is the industry´s only FREE, fully featured front-to-back FPGA design solution for Linux, Windows XP, and Windows Vista]
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 +
===Asynchronous FPGA, AFPGA===
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*[http://www.achronix.com/products.html Achronix-ULTRA]
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**[http://www.pldesignline.com/news/186700955 Achronix preps 2-GHz Asynchronous FPGA for sampling in 2007]
 +
**[http://vlsi.cornell.edu/fpga.php Asynchronous VLSI and Architecture, Cornell University: Asynchronous Field-Programmable Gate Arrays (AFPGAs)] Quote: "...integrated pipelining support..."
 +
**[http://citeseer.ist.psu.edu/teifel03programmable.html Programmable Asynchronous Pipeline Arrays (2003) John Teifel, Rajit Manohar]
 +
 +
[[Category:Hardware ideas]]

Latest revision as of 21:28, 18 July 2008

Contents

[edit] AT91CAP9S500A (ARM9 + FPGA-port)

Why FPGA?:

Take a look at this microcontroller, that integrates an ARM9 microcontroller and a dedicated FPGA port: AT91CAP9S500A. It has "only" a max. clock at 200MHz, but can use a FPGA for hardware acceleration, that could be used for video (de)compression, aacPlus v2/HE-AAC v2 sound (de)compression and many other things. HE-AAC v2 is better than MP3.

  • AT91CAP9S500A Quote: "...The AT91CAP9S500A is built around a 12-layer bus matrix, allowing a maximum internal bandwidth of twelve 32-bit buses. Its distributed DMA architecture enables multiple data transfers to take place between the processor, memories and peripherals with minimal processor overhead...".
  • GNU-Based Software Development on AT91SAM Microcontrollers
  • Maybe this is a good tool?:
  • 02/05/2007, FPGA tool bottleneck stalls HPC Quote: "...Current FPGA synthesis, placement and routing tools are written for hardware designers, not software programmers simply trying to accelerate an algorithm..."

This seems to be a good hardware mix (ARM+FPGA). It does Ogg Theora or MJPEG in the FPGA with 1 million gates:

Just another FPGA+microcontroller example:

I do not think this means what you think it means... I read "...and a metal programmable (MP) block of 500K gates of digital logic." as meaning that it's a one-time programmable block, more akin to a standard-cell ASIC than an FPGA. This is supported by the fact that their development board contains a separate FPGA chip. Now, granted, having a 500K gate ASIC on board an ARM is a cool thing... but not quite as cool as this chip appeared at first glance.

[edit] Possible FPGA

This FPGA is just an example:

  • Spartan-3AN FPGA Capabilities Quote: "...Simple and secure embedded application storage with up to 11Mb of integrated user Flash...Enable simple arithmetic and math functions as well as advanced DSP functions to derive over 330 Giga MACs/sec...Up to 32 18 x 18 embedded multipliers support 18-bit signed or 17-bit unsigned multiplication, and can be cascaded to support wider bits..."
    • XC3S1400AN-4FGG676CES $91
    • XC3S200AN-4FTG256CES $25.87
  • It might be better to introduce a flash based FPGA e.g. one of the igloo series produced by actel, they claim to save a real amount of power. They are available for 20$ for one piece, claimed around 1$ in mass. One also saves PCB space, because no external flash is needed, although the above mentioned Spartan series has also integrated configuration flash, but that is non-standard for SRAM based FPGAs so far. The igloo devices do not have dsp slices, also the amount of RAM is smaller.

[edit] Tool for FPGAs

[edit] Asynchronous FPGA, AFPGA

Personal tools

AT91CAP9S500A (ARM9 + FPGA-port)

Why FPGA?:

Take a look at this microcontroller, that integrates an ARM9 microcontroller and a dedicated FPGA port: AT91CAP9S500A. It has "only" a max. clock at 200MHz, but can use a FPGA for hardware acceleration, that could be used for video (de)compression, aacPlus v2/HE-AAC v2 sound (de)compression and many other things. HE-AAC v2 is better than MP3.

This seems to be a good hardware mix (ARM+FPGA). It does Ogg Theora or MJPEG in the FPGA with 1 million gates:

Just another FPGA+microcontroller example:

I do not think this means what you think it means... I read "...and a metal programmable (MP) block of 500K gates of digital logic." as meaning that it's a one-time programmable block, more akin to a standard-cell ASIC than an FPGA. This is supported by the fact that their development board contains a separate FPGA chip. Now, granted, having a 500K gate ASIC on board an ARM is a cool thing... but not quite as cool as this chip appeared at first glance.